Consider the MIPS instruction sequence given below. Describe in detail a hardware solution to resolve or mitigate (minimize the effect of) potential hazards.

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1) (20%) Consider the MIPS instruction sequence given below. Describe in detail a hardware solution to resolve or mitigate (minimize the effect of) potential hazards.

addi $5, $3, 1 

beq $5, $3, out  // out is somewhere

 

2) Consider the following CPU / cache / memory specifications and trace:

• The cache is an LRU, fully associative, D-cache with 4 lines and 16 bytes per block.

• Initially all the valid and dirty bits are 0; All the references are “write” references

• References trace: AF, B4, AC, C7, D2, F4, F7, 29, 29, 10, D1

 

a. (15%) Provide the result of the traced memory accesses.  The expected result is H, M, or CM, the location of the actual byte that is written in the block, as well as, a snapshot of the entire cache, including overhead bits, before and after a reference word is issued.

 

b. (15%) Repeat part (a) with the following modified assumption: The cache is an LFU, fully associative, I-cache with 4 lines and 16 bytes per block.

 

c. (15%) Repeat part (a) with the following modified assumption: The cache is an OPT, fully associative, I-cache with 4 lines and 16 bytes per block.

 

3) (15%) For a memory/cache configuration with 64K bytes in the memory, a 4-way (four sets) set associative cache with 4 lines per set and 256 bytes per block, find the number of all of the memory blocks from the entire memory that are mapped to cache set 0. 

 

4) Consider a CPU / cache / memory system where access to the cache is 5 seconds and access to the main memory is 100 seconds. A program that has two components, a read component (R) that is reading integers from memory and a compute component (C) that performs a computation on the integers. The total execution time per integer is the time that it takes to read one integer (TR) and the time that it takes to complete the computation on that integer (TC). TC is fixed and takes 5 seconds.  

a. (5%) Assuming that the cache has a hit ratio of 80% find the ETA of the system.

b. (15%) Starting with no cache, it is given that each 1K-bytes of cache memory contributes 1% to the cache hit ratio and due to power consumption costs $0.01 per second. On the other hand, completing the execution (read and compute) on each integer produces a revenue of $1. What is the revenue per integer per second and the cost per integer per second with 85K-bytes of cache?

 

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